The Transport Layer and UDP

December 08, 07 by admin

Transport Layer

The transport layer is one of the 7 layers of the OSI model. It’s purpose is to provide robust end-to-end service to to the upper layers and is responsible for end-to-end delivery of the message. Therefore, the transport layer must consider addressing, reliability, flow control and multiplexing in order to accomplish it’s main goals.

Reliable delivery is not a compulsory service for the transport layer, however since this layer is expected to be responsible for delivering the messages from end-to-end, it only makes sense to implement reliable delivery at this layer. Reliable delivery is provided by using error control, sequence control, loss control and duplication control.




Sequence control is very important because messages not arriving in order can cause very important information to be lost or even overwritten. For example, when one process relies on another, the order in which messages arrive will influence the final result meaning that sequence errors will lead to errors in the application. This is similar to the complexities encountered when working with databases or other applications that are multi-threaded. Consider performing a mathematical calculation. If one process retrieves the stored value to be used in the calculation just before the second process updates that value, then even if that value is updated, the first process is unfortunately using the incorrect value for its calculation.

Of course, if sequence control is an important issue, obviously so it loss control! If messages are not even received, the complexity in dealing with such is far more complex than worrying about putting messages back in order which can be accomplished by the use of sequence numbers. If messages are being lost after transmission over a network, it is not necessary to somehow make sure the lost messages are re-sent in a timely fashion. All this must be accomplished in a way such that performance of the system and entire network is not compromised.




Duplication control is important to consider as well because as the speed of networks continue to increase, it becomes possible for different messages to be identified as duplicated and discarded. Similarly, if a packet can become corrupted or erroneous, it is possible then for the sequence number of a real message to be incorrect and cause a duplicate. Also it is entirely possible for a duplicate message to be sent by the sender itself, and therefore this duplicate should be detected to avoid errors.

Flow control is yet another important component of transport to consider. Imagine all these messages that are being delivered over a network, some coming from very high-speed users, others from slower users possibly still using a dial-up connection. Without flow control, a slower user could quickly become completely flooded with messages and suddenly be unable to do anything. Flow control therefore establishes window sizes to try and make sure the network or users do not run into this problem.

Multiplexing refers to the process where multiple messages are combined into a single signal. Demultiplexing is the reverse process of taking a single signal and splitting it into multiple messages. The transport layer performs a multiplexing (to data link layer)/demultiplexing(from data link layer) function with respect to the interface between itself and the layers below it.

With regard to the transport layer, a connection is not necessarily required since messages can be sent by UDP which is connectionless. Therefore, a connection is only required when a connection-oriented transport protocol is being used. If using a connection-oriented transport protocol, then it is important to consider the complexities involved with connection establishment and connection release. Establishing a connection is a rather straight-forward concept. A connection request is sent, and then the sender waits for an acknowledgment confirming the connection. However, problems can occur when duplicate or expired connection requests or acknowledgments show up!

UDP – User Datagram Protocol




UDP is a way of sending data over a network, however unlike TCP, ordering and reliability is not part of the protocol. Because this reduces a significant amount of overhead, UDP is actually faster and more efficient than TCP. However, for applications that require reliable or guaranteed delivery, UDP will not be acceptable. There is also no flow control or congestion control. UDP can have optional error detection, but does not have any method for recovery. Unlike TCP, UDP is compatible with packet broadcasting which is the sending of a message to everyone on a network

Propositional Logic Rules

November 04, 07 by admin

Commutative Law:

Commutative Law Propositional Logic

Commutative Law Propositional Logic

Associative Law:

Associative Law Propositional Logic

Associative Law Propositional Logic

Distributive Law:

Distributive Law Propositional Logic

Distributive Law Propositional Logic

Tautology Law:

Tautology Law Propositional Logic

Tautology Law Propositional Logic

Absorption Law:

Absorption Law Propositional Logic

Absorption Law Propositional Logic

Demorgan’s Law:

Demorgan’s Law Propositional Logic

Demorgan’s Law Propositional Logic

Double Complementation:

Double Complementation Law Propositional Logic

Implication:

Implication Law Propositional Logic

Complementation:

Complementation Law Propositional Logic

Complementation Law Propositional Logic

Disjunction:

Disjunction Law Propositional Logic

Disjunction Law Propositional Logic

Conjunction:

Conjunction Law Propositional Logic

Conjunction Law Propositional Logic

[1] – Images from Thomas Jefferson High School for Sciene and Technology

Deterministic Finite State Automaton (DFA)

November 04, 07 by admin

A deterministic finite state automaton (DFA) is a simple language recognition device. It can be seen as a state machine where for each pair of state and input symbol there is one and only one transition to a next state. It will take in a string of input symbols and then for each symbol it will transition to another state according to a transition function. More about DFA can be found here.

Examples from [1]:

1) Construct a DFA to accept a string containing a zero followed by a one.

Construct a DFA to accept a string containing a zero followed by a one

2) Construct a DFA to accept a string containing two consecutive zero’s followed by two consecutive ones.

Construct a DFA to accept a string containing two consecutive zero’s followed by two consecutive ones

3) Construct a DFA to accept a string containing even number of zeros and any number of ones.

Construct a DFA to accept a string containing even number of zeros and any number of ones

4) Construct a DFA to accept all stings which do not contain three consecutive zeros.

Construct a DFA to accept all stings which do not contain three consecutive zeros

5) Construct a DFA to accept all strings containing even number of zeros and even number of ones.

Construct a DFA to accept all strings containing even number of zeros and even number of ones.

6) Construct a DFA to accept all strings which satisfy #(x)mod5=2.

Construct a DFA to accept all strings which satisfy #(x)mod5=2

7) Construct a DFA to accept all strings (0+1)* with an equal number of zeros and ones such that each prefix has at most one more zero than ones and at most one more one than zeros.

Construct a DFA to accept all strings (0+1)* with an equal number of zeros and ones such that each prefix has at most one more zero than ones and at most one more one than zeros

[1] – Model Engineering College –

HCS12 Instruction Set

October 22, 07 by admin

The MC68HCS12 microcontroller contains a CISC processor, not a RISC processor.

Load/Store/Load Effective Address [2]

LDAA Load A (M) -> A
LDAB Load B (M)-> B
LDD Load D (M : M + 1) -> (A:B)
LDS Load SP (M : M + 1) -> (SP_h:SP_l)
LDX Load Index Register X (M : M + 1) -> X_h:X_l
LDY Load Index Register Y (M : M + 1) -> Y_h:Y_l
     
STAA Store A (A) -> M
STAB Store B (B) -> M
STD Store D (A) -> M, (B) -> M+1
STS Store SP (SP_h:SP_l) -> M : M+1
STX Store X (X_h:X_l) -> M : M+1
STY Store Y (Y_h:Y_l) -> M : M+1
     
LEAS Load effective address into SP Effective Address -> SP
LEAX Load effective address into X Effective Address ->X
LEAY Load effective address into Y Effective Address ->Y

Ex: X = $1234, Y=$1000, SP=$0A00

Instruction Result
LEAX 10,X X=$1234+$000A = $123E
LEAX $10,Y Y=$1000+$0010 = $1010
LEAS -10,SP SP=$0A00-$000A = $09F6

Stack Instructions [2]
SP is decremented before information is transferred

PSHA Push A (SP) – 1 -> SP; (A) -> M_(sp)
PSHB Push B (SP) – 1 -> SP; (B) -> M_(sp)
PSHC Push CCR (SP) – 1 -> SP; (CCR) -> M_(sp)
PSHD Push D (SP) – 2 -> SP; (A : B) -> M_(sp):M_(sp+1)
PSHX Push X (SP) – 2 -> SP; (X) -> M_(sp):M_(sp+1)
PSHY Push Y (SP) – 2 -> SP; (Y) -> M_(sp):M_(sp+1)
     
PULA Pull A (M_(sp))-> A; (SP) + 1 -> SP
PULB Pull B (M_(sp))-> B; (SP) + 1 -> SP
PULC Pull CCR (M_(sp))-> CCR; (SP) + 1 -> SP
PULD Pull D (M_(sp): M_(sp+1))-> A:B; (SP) + 2 -> SP
PULX Pull X (M_(sp): M_(sp+1))-> X; (SP) + 2 -> SP
PULY Pull Y (M_(sp): M_(sp+1))-> Y; (SP) + 2 -> SP

Increment/Decrement [2]

DEC Decrement Memory (M) – $01 -> M
DECA Decrement A (A) – $01 -> A
DECB Decrement B (B) – $01 -> B
DES Decrement SP (SP) – $0001 -> SP
DEX Decrement X (X) – $0001 -> X
DEY Decrement Y (Y) – $0001 -> Y
     
INC Increment Memory (M) + $01 -> M
INCA Increment A (A) + $01 -> A
INCB Increment B (B) + $01 -> B
INS Increment SP (SP) + $0001 -> SP
INX Increment X (X) + $0001 -> X
INY Increment Y (Y) + $0001 -> Y

Addition and Subtraction [2]

ABA Add B to A (A) + (B) -> A
ADCA Add with carry to A (A) + (M) + C -> A
ADCB Add with carry to B (B) + (M) + C -> B
ADDA Add without carry to A (A) + (M) -> A
ADDB Add without carry to B (B) + (M) -> B
ADDD Add to D (A:B) + (M:M+1) -> A:B
SBA Subtract B from A (A) – (B) -> A
SBCA Subtract with borrow from A (A) – (M) – C -> A
SBCB Subtract with borrow from B (B) – (M) – C -> B
SUBA Subtract memory from A (A) – (M) -> A
SUBB Subtract memory from B (B) – (M) -> B
SUBD Subtract memory from D (A:B) (D) – (M:M+1) -> D

[1] Fredrick M. Cady, Software and Hardware Engineering: Assembly and C Programming for the Freescale HCS12 Microcontroller
[2] Prof. Gilbert Arbez, University of Ottawa CSI3531 Course Notes, Module 4

Introduction to Assembly Language Programming

October 21, 07 by admin

Assembly programming is low-level programming using some basic syntax to represent machine code for a specific CPU. An assembler is used to translate the assembly code into the machine code for the target computer.

A program created from assemblhy can be more efficient and faster than a program created with a compiler. One example of why this occurs is because a compiler will store intermediate values used in a calculation in memory whereas a program written in assembly can store the intermediate values in a register which is much faster. However, while there may be performance benefits to programming so close to the machine level, there is a great deal of added complexity which a high-level programming language can remove.

Table 5.1 Source Code Fields [1]

Label Field Opcode Field Operand(s) Field Comment Field
Example: ldaa #$64 ; Initialize A with hexadecimal 64
  • A label must start with an alphabetic character
  • The label must start in the first column of the source code line unless it ends with a colon.
  • Uppercase and lowercase characters are distinct by default but case sensitivity may be turned off.
  • A label may end with a colon (:)
  • A label may appear on a line by itself
  • The label is optional but when used it can provide a symbolic memory reference such as a branch instruction address, or a symbol for a constant.
  • The opcode field contains either a mnemonic for the operation, an assembler directive or pseudo-operation, or a macro name. For the opcode field, the assembler will convert all uppercase letters to lowercase so this field is not case sensitive.
  • The interpretation of the operand field depends on the opcode.
  • The operand must follow the opcode.
  • Operands can be the symbols, constants, or expressions that are evaluated by the assembler.
  • The operand field also specifies the addressing mode for the instruction.

Using Macros

A macro can be used to give a symbolic name to a group of instructions that are used often. In the source code the macro should be given a name using the label field and then two commands (MACRO & ENDM) are used to indicate the start and finish of the macro. The assembler will then replace every occurrence of the macro with the set of instructions.

Add_B_and_C: MACRO
  MOV A,C
ADD A,B
MOV C,A
ENDM

Macro vs Sub-Routine

A macro and a sub-routine are similar except for the following differences:

  • With a sub-routine the code is present only once. With a macro, the code is inserted in the place of the macro whenever it is used. Therefore, if macros are used instead of sub-routines, the code will end up being longer.
  • With a sub-routine a jump must occur in order to find and execute the sub-routine code. With a macro, this is not required because the code has already been inserted directly. Therefore, a sub-routine will be slightly slower than a macro.

Using either a sub-routine or a macro makes changing the code much easier because changes can be done in one place rather than in each specific location where the code would be used. They also make the code easier to understand.

Assembler Instructions

ORG – Set the program counter to the origin of the program

EQU – Associate the value of an expression with a symbol

SET – Can be used instead of equal. With set, the value can be redefined

DC – Define a constant value

DCB – Define a constant block

DS – Define storage

Example 5-9 ORG – Set Program Counter to Origin for Absolute Assembly [1]

0000 c000 ROM: EQU $c000 ; Location of ROM
0000 0800 RAM: EQU $0800 ; Location of RAM
0000 0A00 STACK: EQU $0a00 ; Location of stack
  ;      
    ORG ROM ; Set program counter to ROM
  ;      
00c000 CF0a 00   lds #STACK ; Initialize SP
00c003 B608 00   ldaa Data_1 ; Load from memory address RAM
  ;      
    ORG RAM ; set program counter
        ; to RAM for the data
000800 Data_1: DS.B $20 ; Set aside $20 bytes

Software Development Process

When programming in any language, following a good development process is necessary in order to deliver a successful product. It is important to resist the urge to jump right into the code immediately, especially when programming in assembly which is extremely complex.

The first step should always be to clearly identify the problem and define a solution to solve that problem. Create and understand the solution in diagrams or pseudo-code before beginning to code in assembly. Translating these diagrams into code will be much easier than trying envision the solution entirely in your mind.

Debugging and tracing through your assembly program will also be a very good way at finding and correcting bugs.

Typical Bugs Include:

  • Incorrect transfer to sub-routine
  • Forgetting to initialize the stack pointer
  • Not enough memory in the stack
  • Sub-routines corrupting registers
  • Forgetting to initialize index registers
  • Modifying the condition code registers before branching
  • Using the wrong branching instruction
  • Using the wrong addressing mode

D-Bug12
The D-Bug12 is the debugging tool stored in the EEPROM of our microcontroller that will be used for debugging as well as for downloading programs onto the card and controlling the assembler.

D-Bug12 Commands

ASM – Assemble/Dissasemble

BF – Block Fill Memory

BR – Set Breakpoint

CALL – Call and execute subroutine

G – Go, run program

GT – Go till an address

HELP – Prints summary of available commands

LOAD – Set in state ready to accept program download from MiniIDE

MD – Display Contents of Memory

MM – Modify Memory

MOVE – Copy block of memory

NOBR – Remove breakpoints

RD – Display register contents

T – Trace through program

UPLOAD – Upload memory to PC

USEHDB – Use EVB/Target hardware breakpoints

VERIF – Compare memory to download file

[1] Fredrick M. Cady, Software and Hardware Engineering: Assembly and C Programming for the Freescale HCS12 Microcontroller
[2] Prof. Gilbert Arbez, University of Ottawa CSI3531 Course Notes, Module 3